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An analog signal to discrete time interval converter (ASDTIC) is a specialized kind of an analog-to-digital converter, which converts the analog input signal (e.g. voltage or current) to time intervals between pulses. This type of conversion is obscure. Its only obvious use, and the origin of the term, lies with NASA around 1970.〔 ASDTIC were used in the control of DC-DC converters.〔 For use in space-rated systems, reliable hybrid circuits were developed to implement the ASDTIC function.〔 == Operation == The DC-DC converters under study in this work〔Research contract NAS12-2017, December 1969 – October 1970, TRW for NASA Lewis Research Center〕 had a similar form as a DC chopper or switching regulator. A bipolar transistor switches current flowing into an L-C network of an inductor and capacitor. To reduce switching losses, the transistor is always turned either fully off or fully on. Control of this transistor is derived from a control circuit that supplies a series of pulses. In the circuits studied here, the pulses are all of equal length. The overall ''ON'' time or mark/space ratio of the pulse train (and thus the output power delivered) is controlled by varying the interval between pulses. Closely spaced pulses increase output. This control signal is derived by use of an ASDTIC circuit.〔 The ASDTIC circuit used is based around an integrator and a threshold detector. The incoming signal is integrated over time and when it exceeds a threshold, a control pulse is generated by the ASDTIC.〔〔 Within the converter control circuit outside the ASDTIC, a One-Shot Pulse Generator then generates a pulse of constant length to drive the switching transistor. The ASDTIC approach was taken in an attempt to improve the regulation and stability of previous switching regulators with linear control systems. These used an error signal derived from the converter's DC output voltage and had a tendency to behave as underdamped second-order systems which were prone to oscillations in their output.〔 The ASDTIC control system of Schoenfeld & Yu was an attempt to improve this dynamic performance. An additional AC component was measured, from the voltage across the output inductor, and this new AC loop signal was also supplied to the integrator within the ASDTIC. Such a second AC loop went beyond the claims of the original Schwartz ASDTIC patent〔 Performance of the new control technique was good: converter stability was enhanced, and its dynamic performance characteristics greatly improved.〔 抄文引用元・出典: フリー百科事典『 ウィキペディア（Wikipedia）』 ■ウィキペディアで「Analog signal to discrete time interval converter」の詳細全文を読む スポンサード リンク
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